Datasheet

Section 6 Bus Controller (BSC)
R01UH0309EJ0500 Rev. 5.00 Page 157 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
6.3 Register Descriptions
The bus controller has the following registers.
• Bus width control register (ABWCR)
• Access state control register (ASTCR)
• Wait control register AH (WTCRAH)
• Wait control register AL (WTCRAL)
• Wait control register BH (WTCRBH)
• Wait control register BL (WTCRBL)
• Read strobe timing control register (RDNCR)
• CS assertion period control register H (CSACRH)
• CS assertion period control register L (CSACRL)
• Area 0 burst ROM interface control register (BROMCRH)
• Area 1 burst ROM interface control register (BROMCRL)
• Bus control register (BCR)
• Address/data multiplexed I/O control register (MPXCR)
• DRAM control register (DRAMCR)
• DRAM access control register (DRACCR)
• Refresh control register (REFCR)
• Refresh timer counter (RTCNT)
• Refresh time constant register (RTCOR)