Datasheet

Page xvi of xxx
9.5 Operation ........................................................................................................................... 491
9.5.1 Normal Mode........................................................................................................ 494
9.5.2 Repeat Mode......................................................................................................... 495
9.5.3 Block Transfer Mode ............................................................................................ 496
9.5.4 Chain Transfer ...................................................................................................... 497
9.5.5 Interrupt Sources................................................................................................... 498
9.5.6 Operation Timing.................................................................................................. 498
9.5.7 Number of DTC Execution States ........................................................................ 499
9.6 Procedures for Using DTC................................................................................................. 501
9.6.1 Activation by Interrupt.......................................................................................... 501
9.6.2 Activation by Software ......................................................................................... 501
9.7 Examples of Use of the DTC ............................................................................................. 502
9.7.1 Normal Mode........................................................................................................ 502
9.7.2 Chain Transfer ...................................................................................................... 503
9.7.3 Chain Transfer when Counter = 0......................................................................... 504
9.7.4 Software Activation .............................................................................................. 506
9.8 Usage Notes ....................................................................................................................... 507
9.8.1 Module Stop Function Setting .............................................................................. 507
9.8.2 On-Chip RAM ...................................................................................................... 507
9.8.3 DTCE Bit Setting.................................................................................................. 507
9.8.4 DMAC Transfer End Interrupt.............................................................................. 507
9.8.5 Chain Transfer ...................................................................................................... 507
Section 10 I/O Ports...........................................................................................509
10.1 Port 1.................................................................................................................................. 523
10.1.1 Port 1 Data Direction Register (P1DDR).............................................................. 523
10.1.2 Port 1 Data Register (P1DR)................................................................................. 524
10.1.3 Port 1 Register (PORT1)....................................................................................... 524
10.1.4 Port 1 Open Drain Control Register (P1ODR) ..................................................... 525
10.1.5 Pin Functions ........................................................................................................ 526
10.2 Port 2.................................................................................................................................. 549
10.2.1 Port 2 Data Direction Register (P2DDR).............................................................. 549
10.2.2 Port 2 Data Register (P2DR)................................................................................. 550
10.2.3 Port 2 Register (PORT2)....................................................................................... 550
10.2.4 Port 2 Open Drain Control Register (P2ODR) ..................................................... 551
10.2.5 Pin Functions ........................................................................................................ 552
10.3 Port 3.................................................................................................................................. 563
10.3.1 Port 3 Data Direction Register (P3DDR).............................................................. 563
10.3.2 Port 3 Data Register (P3DR)................................................................................. 564
10.3.3 Port 3 Register (PORT3)....................................................................................... 564