Datasheet

R01UH0309EJ0500 Rev. 5.00 Page 1401 of 1408
Sep 24, 2012
Index
Numerics
16-Bit counter mode ............................... 839
16-Bit timer pulse unit (TPU)................. 693
8-Bit timer (TMR) .................................. 821
A
A/D conversion accuracy...................... 1086
A/D Converter ...................................... 1059
A/D converter activation......................... 776
Absolute accuracy................................. 1086
Absolute address....................................... 75
Acknowledge.............................. 1021, 1038
Activation by external request ................ 353
Activation by software.................... 498, 501
Address mode ......................................... 424
Address space ........................................... 53
Addressing modes..................................... 74
Advanced mode ........................................ 51
Arithmetic operations ......................... 62, 65
Asynchronous mode ............................... 894
Auto request mode.................................. 428
B
Basic timing............................................ 197
Bcc...................................................... 62, 70
Bit manipulation instructions.................... 68
Bit rate .................................................... 883
Block data transfer instructions ................ 72
Block transfer mode................ 371, 432, 496
Branch instructions................................... 70
Break....................................................... 942
Buffer operation...................................... 752
Bulk-in transfer..................................... 1005
Bulk-out transfer................................... 1004
Burst mode.............................................. 380
Burst Mode ............................................. 430
Burst ROM interface............................... 287
Bus arbitration......................................... 315
Bus controller (BSC)...............................151
Bus release ..............................................318
C
Cascaded connection............................... 839
Cascaded operation .................................756
Chain transfer.......................................... 497
Chain transfer when counter = 0 ............. 504
Clock Pulse Generator .......................... 1201
Clock synchronous communication
mode .....................................................1134
Clocked synchronous mode .................... 912
CMI......................................................... 132
CMIA......................................................840
CMIA0....................................................133
CMIA1....................................................133
CMIB ...................................................... 840
CMIB0 .................................................... 133
CMIB1 .................................................... 133
Communications Protocol..................... 1174
Compare match count mode ...................839
Condition field ..........................................72
Condition-code register (CCR) .................57
Control transfer ....................................... 998
CPU operating modes ............................... 49
Cycle steal mode..................................... 429
D
Data direction register.............................509
Data register............................................ 509
Data size and data alignment .................. 194
Data stage.............................................. 1000