Datasheet

Page 1396 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
Item Page Revision (See Manual for Details)
20.3.5 SS Status
Register (SSSR)
1112,
1113
Deleted
Bit Bit Name Description
6 ORER [Clearing condition]
When writing 0 after reading ORER = 1
(When the CPU is used to clear this flag by
writing 0
hile the corresponding interrupt is enabled, be sure to
ead the flag after writing 0 to it.)
3 TEND [Clearing condition]
• When writing 0 after reading TEND = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure to
read the flag after writing 0 to it.)
2 TDRE [Clearing condition]
• When writing 0 after reading TDRE = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure to
read the flag after writing 0 to it.)
1 RDRF [Clearing condition]
• When writing 0 after reading RDRF = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure to
read the flag after writing 0 to it.)
0 CE [Clearing condition]
• When writing 0 after reading CE = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure to
read the flag after writing 0 to it.)