Datasheet

Section 4 Exception Handling
R01UH0309EJ0500 Rev. 5.00 Page 107 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
4.8 Stack Status after Exception Handling
Figure 4.3 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
CCR
CCR
*
1
PC (16 bits)
SP
EXR
Reserved
*
1
CCR
CCR*
1
PC (16 bits)
SP
CCR
PC (24 bits)
SP
EXR
Reserved
*
1
CCR
PC (24 bits)
SP
Normal Modes
*
2
Advanced Modes
Interrupt control mode 0 Interrupt control mode 2
Interrupt control mode 0 Interrupt control mode 2
Notes: 1.
2.
Ignored on return.
Normal modes are not available in this LSI.
Figure 4.3 Stack Status after Exception Handling