Datasheet

Section 26 Electrical Characteristics
Page 1334 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Tp Tr Tc1 Tcw Tcwp Tc2
φ
A23 to A0
RAS5 to RAS2
UCAS, LCAS
OE, RD
HWR
D15 to D0
UCAS, LCAS
OE, RD
HWR
t
WTS
t
WTH
t
WTS
t
WTH
D15 to D0
WAIT
AS
Read
Write
Tcw: Wait cycle inserted by programmable wait function
Tcwp: Wait cycle inserted by pin wait function
DACK0, DACK1
EDACK2, EDACK3
DACK and EDACK timing: when DDS = 0 and EDDS = 0
RAS timing: when RAST = 0
Note:
Figure 26.16 DRAM Access Timing: Two-State Access, One Wait