Datasheet

Section 26 Electrical Characteristics
Page 1314 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Item Symbol Min. Max. Unit Test Conditions
Counter address read data access time 4 t
AA4
⎯ 2.5 × t
cyc
− 25 ns
Counter address read data access time 5 t
AA5
⎯ 3.0 × t
cyc
− 25 ns
Counter address read data access time 6 t
AA6
⎯ 4.0 × t
cyc
− 25 ns
Multiplex address delay time 6 T
MAD
⎯ 20 ns
Multiplex address setup time 1 T
MAS1
0.5 × t
cyc
− 15 ⎯ ns
Multiplex address setup time 2 T
MAS2
1.5 × t
cyc
− 15 ⎯ ns
Multiplex address hold time T
MAH
1.0 × t
cyc
− 15 ⎯ ns
AH delay time T
AHD
⎯ 15 ns
Figures 26.8 to
26.23, 26.29, and
26.30