Datasheet

Section 24 Power-Down Modes
Page 1224 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
24.2.2 Sleep Mode
(1) Transition to Sleep Mode
When the SLEEP instruction is executed while the SSBY bit is 0 in SBYCR, the CPU enters the
sleep mode. In sleep mode, CPU operation stops but the contents of the CPU's internal registers
are retained. Other peripheral functions do not stop.
(2) Exiting Sleep Mode
Sleep mode is exited by any interrupt, or signals at the RES, or STBY pins.
• Exiting Sleep Mode by Interrupts:
When an interrupt occurs, sleep mode is exited and interrupt exception processing starts. Sleep
mode is not exited if the interrupt is disabled, or interrupts other than NMI are masked by the
CPU.
• Exiting Sleep Mode by RES Pin:
Setting the RES pin level low selects the reset state. After the stipulated reset input duration,
driving the RES pin high starts the CPU performing reset exception processing.
• Exiting Sleep Mode by STBY Pin:
When the STBY pin level is driven low, a transition is made to hardware standby mode.