Datasheet

Section 3 MCU Operating Modes
R01UH0309EJ0500 Rev. 5.00 Page 93 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
H'000000
H'FFC000
H'FFD000
H'000000
H'FFFA00
External address space
Internal I/O registers
External address space
Internal I/O registers
External address space/
Reserved area
*
2
*
4
H'FFFFFF
H'FFFA00
H'FFFF00
H'FFFF20
H'FFFFFF
H'FFFF00
H'FFFF20
H'020000
H'FFC000
H'FFD000
Reserved area
*
4
External address space/
Reserved area
*
2
*
4
Data flash area 8 Kbytes
H'FE8000
H'FE8000
H'F02000
H'F00000
RAM: 48 Kbytes
Modes 1 and 2
(Expanded mode with
on-chip ROM disabled)
ROM: 128 Kbytes
RAM: 48 Kbytes
Mode 3
(Boot mode)
External address
space
On-chip ROM
External address space/
Reserved area
*
2
*
4
External address space/
Reserved area
*
2
*
4
Internal I/O registers
Internal I/O registers
Reserved area
*
4
Notes: 1. This area is specified as the external address space by clearing the RAME bit in SYSCR to 0.
2. This area is specified as the external address space when EXPE = 1 and the reserved area when EXPE = 0.
3. On-chip RAM is used for flash memory programming. The RAME bit in SYSCR should not be cleared to 0.
4. A reserved area should not be accessed.
Reserved area
*
4
H'080000
Reserved area
*
4
On-chip RAM*
3
H'FF0000
Reserved area
*
4
H'FF0000
On-chip RAM/
External address space
*
1
Figure 3.3 Memory Map in Each Operating Mode (ROM: 128-Kbyte Version):
H8S/24565, H8S/24565R, and H8S/24545