Datasheet

Section 22 Flash Memory
R01UH0309EJ0500 Rev. 5.00 Page 1153 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
22.3.1 User Programming Mode
In the user programming mode, the flash memory can be programmed by the CPU through
execution of software commands. In this mode, the user ROM and data flash can be programmed
without using a ROM programmer with the microcomputer mounted on a system board.
The programming and block erase commands should be executed only in each block area of the
user ROM and data flash.
The user programming mode provides the erase/write 0 mode (EW0 mode). Table 22.4 gives an
overview of the EW0 mode specifications.
Table 22.4 EW0 Mode Specifications
Item Description
Operating mode
• Single-chip mode
• On-chip ROM enabled expanded mode
Area for storing the programming
control program
User ROM
Area for executing the
programming control program
The programming control program should be transferred to an
area outside the flash memory (such as RAM) before
execution*
2
Programmable area User ROM, data flash
Limitations on software
commands
None
Mode after programming or
erasure
Read status register mode
CPU state during automatic
programming or erasure
Operating*
1
Flash memory status detection
• Reading the FMPRSF and FMERSF bits in FLMSTR by a
program.
• Executing a read status register command to read the SR7,
SR5, and SR4 bits in the status register.
Notes: 1. Make sure that no interrupt (except NMI) or DMA transfer is generated.
2. In the user programming mode, the programming control program should be executed
in the on-chip RAM or an external area.