Datasheet

Section 3 MCU Operating Modes
R01UH0309EJ0500 Rev. 5.00 Page 87 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
3.3 Operating Mode Descriptions
3.3.1 Mode 1
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is disabled.
Ports A to C function as an address bus, ports D and E function as a data bus, and parts of ports F
to H function as bus control signals.
The initial bus mode immediately after a reset is 16 bits, with 16-bit access to all areas. However,
if 8-bit access is designated for all areas by the bus controller, the bus mode switches to 8 bits.
3.3.2 Mode 2
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is disabled.
Ports A to C function as an address bus, ports D and E function as a data bus, and parts of ports F
to H function as bus control signals.
The initial bus mode immediately after a reset is 8 bits, with 8-bit access to all areas. However, if
16-bit access is designated for any one of the areas by the bus controller, the bus mode switches to
16 bits and port E functions as a data bus.
3.3.3 Mode 3
This mode is a boot mode of the flash memory. This mode is the same as mode 7, except for the
programming and erasure of the flash memory. Mode 3 is only available in the flash memory
version.