Datasheet

Section 3 MCU Operating Modes
R01UH0309EJ0500 Rev. 5.00 Page 83 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Section 3 MCU Operating Modes
3.1 Operating Mode Selection
The H8S/2456 Group, H8S/2454 Group, and H8S/2456R Group have five operating modes
(modes 1 to 4 and 7). The operating mode is selected by the setting of mode pins (MD2 to MD0).
Modes 1, 2, and 4 are externally expanded modes in which the CPU can access an external
memory and peripheral devices. In an externally expanded mode, the external address space can
be designated as an 8-bit or 16-bit address space for each area by the bus controller at the
beginning of program execution. If a 16-bit address space is designated for any one area, the 16-
bit bus mode is selected. If an 8-bit address space is designated for all areas, the 8-bit bus mode is
selected.
Mode 7 is a single-chip activation expanded mode in which the CPU can switch to access an
external memory and peripheral devices at the beginning of program execution.
Mode 3 is a boot mode in which the flash memory can be programmed or erased. For details on
the boot mode, refer to section 22, Flash Memory.
The settings for pins MD2 to MD0 should not be changed during LSI operation.
Table 3.1 MCU Operating Modes
External Data Bus
MCU
Operating
Mode
MD2 MD1 MD0
CPU
Operating
Mode
Description
On-Chip
ROM
Initial
Value
Max.
Value
1
*
0 0 1 Advanced Expanded mode with
on-chip ROM disabled
Disabled 16 bits 16 bits
2
*
0 1 0 Advanced Expanded mode with
on-chip ROM disabled
Disabled 8 bits 16 bits
3 0 1 1 Advanced Boot mode Enabled ⎯ 16 bits
4 1 0 0 Advanced Expanded mode with
on-chip ROM enabled
Enabled 8 bits 16 bits
7 1 1 1 Advanced Single-chip mode Enabled ⎯ 16 bits
Note:
*
Only modes 1 and 2 may be used in ROM-less versions.