Datasheet

Section 18 A/D Converter
R01UH0309EJ0500 Rev. 5.00 Page 1091 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
18.7.8 Notes on Noise Countermeasures
A protection circuit connected to prevent damage due to an abnormal voltage such as an excessive
surge at the analog input pins (AN0 to AN15*) should be connected between AVcc and AVss as
shown in figure 18.12. Also, the bypass capacitors connected to AVcc and the filter capacitor
connected to the AN0 to AN11 pins must be connected to AVss.
If a filter capacitor is connected, the input currents at the AN0 to AN15* pins are averaged, and so
an error may arise. Also, when A/D conversion is performed frequently, as in scan mode, if the
current charged and discharged by the capacitance of the sample-and-hold circuit in the A/D
converter exceeds the current input via the input impedance (R
in
), an error will arise in the analog
input pin voltage. Careful consideration is therefore required when deciding the circuit constants.
Note: * In the H8S/2454 group, only AN0 to AN7, AN11, and AN12 are available as analog
input pins.
AVCC
*
1
*
1
Vref
AN0 to AN15*
AV
SS
Notes: Values are reference values.
1.
2. R
in
: Input impedance
3. The H8S/2454 Group has only AN0 to AN7, AN11, and AN12 as analog input pins.
R
in
*
2
3
100 Ω
0.1 µF
0.01 µF10 µF
Figure 18.12 Example of Analog Input Protection Circuit
Table 18.9 Analog Pin Specifications
Item Min. Max. Unit
Analog input capacitance ⎯ 15 pF
Permissible signal source impedance ⎯ 5 kΩ