Datasheet
Section 18 A/D Converter
R01UH0309EJ0500 Rev. 5.00 Page 1085 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
ADTRG0
ADST
A/D conversion
φ
Internal trigger
signal
Figure 18.8 External Trigger Input Timing when Multiple Units Start Simultaneously
(TRSG1, TRGS0, and EXTRGS = B'111)
18.5 Interrupt Source
The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion.
Setting the ADIE bit to 1 when the ADF bit in ADCSR is set to 1 after A/D conversion is
completed enables ADI interrupt requests. The data transfer controller (DTC) and DMA controller
(DMAC) * can be activated by an ADI interrupt. Having the converted data read by the DTC or
DMAC* in response to an ADI interrupt enables continuous conversion to be achieved without
imposing a load on software.
Note: * Only possible in unit 0.
Table 18.8 A/D Converter Interrupt Source
Name Interrupt Source Interrupt Flag DTC Activation DMAC Activation
ADI0 A/D conversion end ADF Possible* Possible
Note: * Only possible in unit 0.