Datasheet

Section 16 USB Function Module (USB)
Page 984 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
16.3.32 Transceiver Test Register 1 (TRNTREG1)
TRNTREG1 is a test register that can monitor the on-chip transceiver input signal.
Setting bits PTSTE and txenl in TRNTREG0 to 1 enables monitoring the on-chip transceiver input
signal. Table 16.5 shows the relationship between pin input and TRNTREG1 monitoring value.
Bit Bit Name
Initial
Value R/W Description
7 to 3 ⎯ All 0 ⎯
Reserved
These bits are always read as 0. The write value should
always be 0.
2
1
0
xver_data
dpls
dmns
0
0
0
R
R
R
On-Chip Transceiver Input Signal Monitor
xver_data: Monitors the differential input level
(xver_data) signal of the on-chip
transceiver.
dpls: Monitors the USD+ (dpls) signal of the on-
chip transceiver.
dmns: Monitors the USD- (dmns) signal of the on-
chip transceiver.