Datasheet

Section 6 Bus Controller (BSC)
Page 196 of 1408 R01UH0309EJ0500 Rev. 5.00
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
6.5.2 Valid Strobes
Table 6.3 shows the data buses used and valid strobes for the access spaces.
In a read, the RD signal is valid for both the upper and the lower half of the data bus. In a write,
the HWR signal is valid for the upper half of the data bus, and the LWR signal for the lower half.
Table 6.3 Data Buses Used and Valid Strobes
Area
Access
Size
Read/
Write Address
Valid
Strobe
Upper Data Bus
(D15 to D8)
Lower Data
Bus (D7 to D0)
Byte Read ⎯ RD Valid Invalid 8-bit access
space
Write ⎯ HWR Hi-Z
Byte Read Even RD Valid Invalid 16-bit access
space
Odd Invalid Valid
Write Even HWR Valid Hi-Z
Odd LWR Hi-Z Valid
Word Read ⎯ RD Valid Valid
Write ⎯ HWR, LWR Valid Valid
Note: Hi-Z: High-impedance state
Invalid: Input state; input value is ignored.