Datasheet

Section 12 Programmable Pulse Generator (PPG)
R01UH0309EJ0500 Rev. 5.00 Page 805 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
• NDRLH*
Bit Bit Name Initial Value R/W Description
7
6
5
4
NDR7
NDR6
NDR5
NDR4
0
0
0
0
R/W
R/W
R/W
R/W
Next Data Register 7 to 4
The register contents are transferred to the
corresponding PODRL bits by the output trigger
specified with PCR.
3 to 0 ⎯ All 1 ⎯ Reserved
1 is always read and write is disabled.
• NDRLL*
Bit Bit Name Initial Value R/W Description
7 to 4 ⎯ All 1 ⎯ Reserved
1 is always read and write is disabled.
3
2
1
0
NDR3
NDR2
NDR1
NDR0
0
0
0
0
R/W
R/W
R/W
R/W
Next Data Register 3 to 0
The register contents are transferred to the
corresponding PODRL bits by the output trigger
specified with PCR.
Note: * When pulse output groups 2 and 3 have the same output trigger by PCR settings, the
NDRH address is H'FF4C. When they have different output triggers, the NDRL
address corresponding to the group 2 is NDRHH (H'FF4E) and the NDRH address
corresponding to the group 3 is NDRHL (H'FF4C). Also, when pulse output groups 0
and 1 have the same output trigger by PCR settings, the NDRL address is H'FF4D.
When they have different output triggers, the NDRL addresses corresponding to the
groups 0 and 1 are NDRLL (H'FF4F) and NDRLH (H'FF4D), respectively.