Datasheet

Section 10 I/O Ports
R01UH0309EJ0500 Rev. 5.00 Page 687 of 1408
Sep 24, 2012
H8S/2456, H8S/2456R, H8S/2454 Group
Bit Bit Name Initial Value R/W Description
1 A17E 1 R/W Address 17 Enable
Enables or disables output for address output 17
(A17).
0: DR output when PA1DDR = 1
1: A17 output when PA1DDR = 1
0 A16E 1 R/W Address 16 Enable
Enables or disables output for address output 16
(A16).
0: DR output when PA0DDR = 1
1: A16 output when PA0DDR = 1
10.18.3 Port Function Control Register 2 (PFCR2)
PFCR2 enables or disables AS output, LWR output, and OE output.
Bit Bit Name Initial Value R/W Description
7 to 4 ⎯ All 0 ⎯ Reserved
These bits are always read as 0 and cannot be
modified.
3 ASOE 1 R/W AS Output Enable
Enables or disables the AS output pin.
0: PF6 is designated as I/O port
1: PF6 is designated as AS output pin
2 LWROE 1 R/W LWR Output Enable
Enables or disables the LWR output pin.
0: PF3 is designated as I/O port
1: PF3 is designated as LWR output pin