Datasheet

Section 14 Watchdog Timer (WDT)
Page 856 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Bit Bit Name Initial Value R/W Description
6 WT/IT 0 R/W Timer Mode Select
Selects whether the WDT is used as a watchdog
timer or interval timer.
0: Interval timer mode
When TCNT overflows, an interval timer interrupt
(WOVI) is requested.
1: Watchdog timer mode
When TCNT overflows, the WDTOVF signal is
output.
5 TME 0 R/W Timer Enable
When this bit is set to 1, TCNT starts counting.
When this bit is cleared, TCNT stops counting and
is initialized to H'00.
4, 3 ⎯ All 1 ⎯ Reserved
These bits are always read as 1 and cannot be
modified.
2
1
0
CKS2
CKS1
CKS0
0
0
0
R/W
R/W
R/W
Clock Select 2 to 0
Selects the clock source to be input to TCNT. The
overflow frequency for φ = 20 MHz is enclosed in
parentheses.
000: Clock φ/2 (frequency: 25.6 μs)
001: Clock φ/64 (frequency: 819.2 μs)
010: Clock φ/128 (frequency: 1.6 ms)
011: Clock φ/512 (frequency: 6.6 ms)
100: Clock φ/2048 (frequency: 26.2 ms)
101: Clock φ/8192 (frequency: 104.9 ms)
110: Clock φ/32768 (frequency: 419.4 ms)
111: Clock φ/131072 (frequency: 1.68 s)
Note: * Only a write of 0 is permitted, to clear the flag.