Datasheet

Section 10 I/O Ports
Page 618 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
• PA4/A20/IRQ4-A/SCS0-B
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, bits MSS, CSS1, and CSS0 in SSCRH and bit SSUMS in SSCRL of the
SSU, bit A20E in PFCR1, bit PA4DDR, and bit ITS4 in ITSR of the interrupt controller.
Operating
mode
1, 2 4
EXPE ⎯ ⎯
A20E ⎯ 0 1
SSU settings ⎯ (1) in table
below
(2) in
table
below
(4) in
table
below
(3) in
table
below
⎯
PA4DDR ⎯ 0 1 0*
5
0*
5
⎯ 0 1
A20 output PA4
input
PA4
output
SCS0-B
input*
2
*
6
SCS0-B
I/O*
4
*
6
SCS0-B
output*
3
*
6
PA4
input
A20
output
Pin function
IRQ4-A interrupt input*
1
Operating
mode
3, 7
EXPE 0 1
A20E ⎯ 0 1
SSU settings (1) in table
below
(2) in
table
below
(4) in
table
below
(3) in
table
below
(1) in table
below
(2) in
table
below
(4) in
table
below
(3) in
table
below
⎯
PA4DDR 0 1 0*
5
0*
5
⎯ 0 1 0*
5
0*
5
⎯ 0 1
PA4
input
PA4
output
SCS0-B
input*
2
*
6
SCS0-B
I/O*
4
*
6
SCS0-B
output*
3
*
6
PA4
input
PA4
output
SCS0-B
input*
2
*
6
SCS0-B
I/O*
4
*
6
SCS0-B
output*
3
*
6
PA4
input
A20
output
Pin function
IRQ4-A interrupt input*
1
Notes: 1. IRQ4-A input when the ITS4 bit in ITSR is 0.
2. When using as SCS0-B input, set SCS0S1 and SCS0S0 in PFCR5 to B'01 before other
register setting.
3. When using as SCS0-B output, set SCS0S1 and SCS0S0 in PFCR5 to B'01 before
other register setting.
4. When using as SCS0-B input/output, set SCS0S1 and SCS0S0 in PFCR5 to B'01
before other register setting.
5. PA4DDR = 0 when the SSU pin is used as input.
6. Do not set up for SSU unless SCS0S1 and SCS0S0 = B'01 in PFCR5.
Use as I/O port.