Datasheet

Section 10 I/O Ports
Page 614 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
• Modes 3 and 7 (EXPE = 0)
A23E ⎯
CS7E*
6
0
SSU settings (1) in table below (2) in table below (3) in table below
PA7DDR 0 1 0*
4
⎯
PA7 input PA7 output SSO0-B input*
2
*
5
SSO0-B output*
3
*
5
Pin function
IRQ7-A interrupt input*
1
Notes: 1. IRQ7-A input when the ITS7 bit in ITSR is 0.
2. When using as SSO0-B input, set SSO0S1 and SSO0S0 in PFCR5 to B'01 before other
register setting.
3. When using as SSO0-B output, set SSO0S1 and SSO0S0 in PFCR5 to B'01 before
other register setting.
4. PA7DDR = 0 when the SSU pin is used as input.
5. Do not set up for SSU unless SSOS01 and SSO0S0 = B'01 in PFCR5.
Use as I/O port.
6. Supported only in the H8S/2424 Group and not supported in the H8S/2426 and
H8S/2426R Groups.
SSU
settings
(1) (2) (1) (2) (1) (3) (3) (2) (3) (2) (3) (1) (3) (3) (1) (3) (3)
SSUMS 0 0 1*
1
BIDE 0 1*
2
0
MSS 0 1 0 1 0 1
TE 0 1 0 1 0 1 0 1 0 1 0 1
RE 0 1 0 1 1 0 1 1 0 1 0 1 0 1 1 0 1
Pin state ⎯ SSO
input
⎯ SSO
input
⎯ SSO
output
SSO
output
SSO
input
SSO
output
SSO
input
SSO
output
⎯ SSO
output
SSO
output
⎯ SSO
output
SSO
output
[Legend]
⎯: Not used as the SSU pin (can be used as an I/O port).
Notes: See tables 19.4 to 19.6.
1. Do not set BIDE to 1 when SSUMS = 1 in SSU.
2. Do not specify that TE = RE = 1 when operating with BIDE = 1 (bidirectional mode).