Datasheet

Section 10 I/O Ports
R01UH0310EJ0500 Rev. 5.00 Page 555 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
P23/IRQ11-B/PO3-A/TIOCD3-A/TxD4-A
The pin function is switched as shown below according to the combination of the TPU channel
3 settings (by bits MD3 to MD0 in TMDR_3, bits IOD3 to IOD0 in TIORL_3, and bits
CCLR2 to CCLR0 in TCR_3), bit NDER3 in NDERL of the PPG, bit TE in SCR_4 of the SCI,
bits PPGS and TPUS in PFCR3, bit TXD4S in PFCR4, bit P23DDR, and bit ITS11 in ITSR of
the interrupt controller.
TPU channel 3
settings
(1) in table
below
(2) in table below
TE 0 1
P23DDR 0 1
NDER3 0 1
P23 input P23 output PO3-A output*
3
TxD4-A
output*
5
TIOCD3-A
output*
4
TIOCD3-A input*
1
*
4
Pin function
IRQ11-B interrupt input*
2
Notes: 1. TIOCD3-A input when MD3 to MD0 = B'0000 and IOD3 to IOD0 = B'10xx.
2. IRQ11-B input when the ITS11 bit in ITSR is 1.
3. When using as PO3-A output, set PPGS in PFCR3 to 0 before other register setting.
4. When using as TIOCD3-A input/output, set TPUS in PFCR3 to 0 before other register
setting.
5. When using as TxD4-A output, set TXD4S in PFCR4 to 0 before other register setting.
TPU channel 3
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOD3 to IOD0 B'0000,
B'0100,
B'1xxx
B'0001 to
B'0011,
B'0101 to
B'0111
B'xx00 Other than B'xx00
CCLR2 to
CCLR0
Other than
B'110
B'110
Output function Output
compare
output
PWM mode
2 output
[Legend]
x: Don't care