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ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 144 (20x20) 16-Bit 33 MHz I/O number 96
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Section 8 EXDMA Controller (EXDMAC)
Page 466 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
φ pin
EDREQ
EDRAK
Bus cycle
CPU
operation
EDACK
ETEND
1-block-size transfer period
1 bus cycle
CPU
cycle
CPU
cycle
External
space
External
space
CPU
cycle
CPU
cycle
CPU
cycle
CPU
cycle
CPU
cycle
CPU
cycle
External
space
External
space
External
space
External
space
External
space
External
space
1 bus cycle
1 bus cycle
Last transfer
in block
EXDMA
transfer cycle
EXDMA
transfer cycle
EXDMA
transfer cycle
EXDMA
transfer cycle
EXDMA
transfer cycle
EXDMA
transfer cycle
EXDMA
transfer cycle
Repeated
Figure 8.43 External Request/Cycle Steal Mode/Block Transfer Mode
(CPU Cycles/Single Address Mode/Low Level Sensing/BGUP = 1)