Datasheet

Section 8 EXDMA Controller (EXDMAC)
R01UH0310EJ0500 Rev. 5.00 Page 417 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Bit Bit Name Initial Value R/W Description
3 DTSIZE 0 R/W Data Transmit Size
Specifies the size of data to be transferred.
0: Byte-size
1: Word-size
2 BGUP 0 R/W Bus Give-Up
When this bit is set to 1, the bus can be transferred
to an internal bus master in burst mode or block
transfer mode. This setting is ignored in normal
mode and cycle steal mode.
0: Bus is not released
1: Bus is transferred if requested by an internal bus
master
1
0
⎯
⎯
0
0
R/W
R/W
Reserved
These bits are always read as 0. The initial values
should not be modified.
Note: * Only 0 can be written, to clear the flag.