Datasheet

Page xxv of xxx
17.5 Interrupt Source ............................................................................................................... 1017
17.6 A/D Conversion Accuracy Definitions ............................................................................ 1018
17.7 Usage Notes ..................................................................................................................... 1020
17.7.1 Module Stop Function Setting ............................................................................ 1020
17.7.2 A/D Input Hold Function in Software Standby Mode ........................................ 1020
17.7.3 Restarting the A/D Converter ............................................................................. 1020
17.7.4 Permissible Signal Source Impedance................................................................ 1021
17.7.5 Influences on Absolute Accuracy ....................................................................... 1022
17.7.6 Setting Range of Analog Power Supply and Other Pins..................................... 1022
17.7.7 Notes on Board Design ....................................................................................... 1023
17.7.8 Notes on Noise Countermeasures ....................................................................... 1023
17.7.9 Concurrent Operation of Two A/D Converters................................................... 1025
17.7.10 Notes on Start of A/D Conversion by Conversion Start Trigger from TPU
(Units 0 and 1) .................................................................................................... 1026
Section 18 D/A Converter................................................................................1027
18.1 Features............................................................................................................................ 1027
18.2 Input/Output Pins............................................................................................................. 1029
18.3 Register Descriptions....................................................................................................... 1030
18.3.1 D/A Data Registers 2 and 3 (DADR2 and DADR3)........................................... 1030
18.3.2 D/A Control Register 23 (DACR23) .................................................................. 1030
18.4 Operation ......................................................................................................................... 1033
18.5 Usage Notes ..................................................................................................................... 1035
18.5.1 Module Stop Function Setting ............................................................................ 1035
18.5.2 D/A Output Hold Function in Software Standby Mode...................................... 1035
Section 19 Synchronous Serial Communication Unit (SSU) ..........................1037
19.1 Features............................................................................................................................ 1037
19.2 Input/Output Pins............................................................................................................. 1039
19.3 Register Descriptions....................................................................................................... 1039
19.3.1 SS Control Register H (SSCRH) ........................................................................ 1040
19.3.2 SS Control Register L (SSCRL) ......................................................................... 1042
19.3.3 SS Mode Register (SSMR)................................................................................. 1043
19.3.4 SS Enable Register (SSER) ................................................................................ 1044
19.3.5 SS Status Register (SSSR).................................................................................. 1045
19.3.6 SS Control Register 2 (SSCR2) .......................................................................... 1047
19.3.7 SS Transmit Data Registers 0 to 3 (SSTDR0 to SSTDR3)................................. 1049
19.3.8 SS Receive Data Registers 0 to 3 (SSRDR0 to SSRDR3).................................. 1050
19.3.9 SS Shift Register (SSTRSR)............................................................................... 1050
19.4 Operation ......................................................................................................................... 1051