Datasheet

Section 25 Electrical Characteristics
Page 1274 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
25.3.5 Timing of On-Chip Peripheral Modules
The on-chip peripheral module timings are shown below.
T
1
t
PRS
t
PRH
t
PWD
T
2
φ
Ports 1 to 6, 8, 9,
A to J (read)
Ports 1 to 3, 6, 8,
P53 to P50,
ports A to J
(write)
Figure 25.36 I/O Port Input/Output Timing
φ
PO15 to PO0
t
POD
Figure 25.37 PPG Output Timing