Datasheet
Section 23 Power-Down Modes
R01UH0310EJ0500 Rev. 5.00 Page 1155 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
(4) Software Standby Mode Application Example
Figure 23.2 shows an example in which a transition is made to software standby mode at the
falling edge on the NMI pin, and software standby mode is cleared at the rising edge on the NMI
pin.
In this example, after an NMI interrupt is accepted with the NMIEG bit in INTCR cleared to 0
(falling edge specification), the NMIEG bit is set to 1 (rising edge specification). And after the
SSBY bit is set to 1, a SLEEP instruction is executed, causing a transition to software standby
mode.
Software standby mode is then cleared at the rising edge on the NMI pin.
Oscillator
NMI
φ
NMIEG
SSBY
NMI exception
handling
NMIEG=1
SSBY=1
SLEEP instruction
Software standby mode
(power-down mode)
Oscillation
stabilization
time t
OSC2
NMI exception
handling
Figure 23.2 Software Standby Mode Application Example