Datasheet

Section 22 Clock Pulse Generator
R01UH0310EJ0500 Rev. 5.00 Page 1131 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Section 22 Clock Pulse Generator
This LSI has an on-chip clock pulse generator (CPG) that generates the system clock (φ) and
internal clocks. The clock pulse generator consists of an oscillator circuit, a system-clock PLL
circuit and a divider.
Figure 22.1 shows a block diagram of the clock pulse generator.
EXTAL
System-clock
PLL circuit
(×1, 2)
Oscillator
Divider
System clock
to φ pin
Internal cloc
k
to peripheral
modules
STC0, STC1
PLLCR
XTAL
[Legend]
PLLCR: PLL control register
Figure 22.1 Block Diagram of Clock Pulse Generator
The frequency of the system clock from the oscillator can be changed by means of the system-
clock PLL circuit and divider. Frequency changes are made by software by means of settings in
the PLL control register (PLLCR).