Datasheet
Section 19 Synchronous Serial Communication Unit (SSU)
R01UH0310EJ0500 Rev. 5.00 Page 1061 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
Bit
6
Bit
7
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
Bit
6
Bit
7
LSI operation
User operation
Dummy-read SSRDR0 and SSRDR1
SSRDR1
SCS
SSCK
RDRF
SSI
(LSB first)
SSI
(MSB first)
SSRDR0
SSRDR0 SSRDR1
1 frame
RXI interrupt
generated
Figure 19.7 (2) Example of Reception Operation (SSU Mode) When 16-Bit Data Length is
Selected (SSRDR0 and SSRDR1 are Valid) with CPOS = 0 and CPHS = 0
Bit
0
Bit
1
to
Bit
7
Bit
6
LSI operation
User operation
SSI
(LSB first)
SSI
(MSB first)
SCS
SSCK
RDRF
SSRDR2 SSRDR1 SSRDR0
Bit
0
Bit
1
to
Bit
7
Bit
6
Bit
0
Bit
1
to
Bit
7
Bit
6
Bit
7
Bit
6
to
Bit
0
Bit
1
SSRDR0 SSRDR1 SSRDR2
Bit
7
Bit
6
to
Bit
0
Bit
1
Bit
7
Bit
6
to
Bit
0
Bit
1
1 frame
Dummy-read SSRDR0,
SSRDR1, and SSRDR2
RXI interrupt
generated
Figure 19.7 Example of Reception Operation (SSU Mode) When 24-Bit Data Length is
Selected (SSRDR0, SSRDR1, and SSRDR2 are Valid) with CPOS = 0 and CPHS = 0 (3)