Datasheet

Section 17 A/D Converter
Page 1016 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
17.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. For unit 0, an external trigger is input from the
ADTRG0 pin when the TRGS1, TRGS0, and EXTRGS bits are set to B'110 or B'001 in ADCR_0.
For unit 1, an external trigger is input from the ADTRG1 pin when the TRGS1, TRGS0, and
EXTRGS bits are set to B'110 in ADCR_1. For multiple-unit simultaneous start, an external
trigger is input from the ADTRG0 pin when the TRGS1, TRGS0, and EXTRGS bits are set to
B'111 in ADCR. A/D conversion starts when the ADST bit in ADCSR is set to 1 on the falling
edge of the ADTRG0 pin. Other operations, in both single and scan modes, are the same as when
the ADST bit has been set to 1 by software. Figure 17.7 shows the timing. Figure 17.8 shows the
timing of multiple-unit simultaneous start.
A/D conversion
ADST
φ
ADTRG0
Internal trigger
signal
Figure 17.7 External Trigger Input Timing (TRGS1, TRGS0, and EXTRGS ≠ B'111)