Datasheet

Section 16 I2C Bus Interface 2 (IIC2)
R01UH0310EJ0500 Rev. 5.00 Page 971 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
16.4 Operation
16.4.1 I
2
C Bus Format
Figure 16.3 shows the I
2
C bus formats. Figure 16.4 shows the I
2
C bus timing. The first frame
following a start condition always consists of 8 bits.
S SLA R/W A DATA A A/A P
111
1n7
1 m
(a) I
2
C bus format
(b) I
2
C bus format (start condition retransmission)
n: transfer bit count
(n = 1 to 8)
m: transfer frame count
(m ≥ 1)
S SLA R/W A DATA
11
1 n17
1 m1
S SLA R/W A DATA A/A P
11
1 n27
1 m2
1
11
A/A
n1 and n2: transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: transfer frame count (m1 and m2 ≥ 1)
11
Figure 16.3 I
2
C Bus Formats
SDA
SCL
S
1-7
SLA
8
R/W
9
A
1-7
DATA
89 1-7 89
A DATA P
A
Figure 16.4 I
2
C Bus Timing