Datasheet

Section 6 Bus Controller (BSC)
Page 248 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
T
p
RASn (CSn)
Read
Write
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
DACK or EDACK
Address bus
φ
T
r
T
c1
T
c2
Note: n = 2 to 5
Row address Column address
High
High
Figure 6.53 Example of DACK/EDACK Output Timing when DDS = 1 or EDDS = 1
(RAST = 0, CAST = 0)