Datasheet

Section 17 A/D Converter
Page 998 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Table 17.4 Analog Input Channels and Corresponding ADDR Registers (H8S/2424 Group)
Analog Input Channel Analog Input Channel
Channel Set 0
(CH3 = 0)
Data Register Storing
Conversion Result
Channel Set 0
(CH3 = 0)
Data Register Storing
Conversion Result
AN0 ADDRA_0 ⎯ ⎯
AN1 ADDRB_0 ⎯ ⎯
AN2 ADDRC_0 ⎯ ⎯
AN3 ADDRD_0 ⎯ ⎯
AN4 ADDRE_0 AN12 ADDRE_1
AN5 ADDRF_0 AN13 ADDRF_1
AN6 ADDRG_0 ⎯ ⎯