Datasheet

Section 2 CPU
R01UH0310EJ0500 Rev. 5.00 Page 61 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
2.5.2 Memory Data Formats
Figure 2.10 shows the data formats in memory. The H8S/2600 CPU can access word data and
longword data in memory, but word or longword data must begin at an even address. If an attempt
is made to access word or longword data at an odd address, no address error occurs but the least
significant bit of the address is regarded as 0, so the access starts at the preceding address. This
also applies to instruction fetches.
When SP (ER7) is used as an address register to access the stack, the operand size should be word
size or longword size.
70
76 543210
MSB
LSB
MSB
MSB
LSB
LSB
Data Type Address
1-bit data
Byte data
Word data
Address L
Address L
Address 2M
Address 2M+1
Longword data Address 2N
Address 2N+1
Address 2N+2
Address 2N+3
Data Format
Figure 2.10 Memory Data Formats