Datasheet

Section 13 8-Bit Timers (TMR)
R01UH0310EJ0500 Rev. 5.00 Page 841 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
13.5.2 Timing of CMFA and CMFB Setting when Compare-Match Occurs
The CMFA and CMFB flags in TCSR are set to 1 by a compare match signal generated when the
TCOR and TCNT values match. The compare match signal is generated at the last state in which
the match is true, just before the timer counter is updated. Therefore, when TCOR and TCNT
match, the compare match signal is not generated until the next incrementation clock input. Figure
13.6 shows this timing.
TCNT
φ
N
N + 1
TCOR N
Compare match
signal
CMF
Figure 13.6 Timing of CMF Setting