Datasheet

Section 12 Programmable Pulse Generator (PPG)
R01UH0310EJ0500 Rev. 5.00 Page 807 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
12.3.1 Next Data Enable Registers H, L (NDERH, NDERL)
NDERH, NDERL enable or disable pulse output on a bit-by-bit basis. For outputting pulse by the
PPG, set the corresponding DDR to 1.
• NDERH
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
NDER15
NDER14
NDER13
NDER12
NDER11
NDER10
NDER9
NDER8
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Next Data Enable 15 to 8
When a bit is set to 1, the value in the
corresponding NDRH bit is transferred to the
PODRH bit by the selected output trigger. Values
are not transferred from NDRH to PODRH for
cleared bits.
• NDERL
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
NDER7
NDER6
NDER5
NDER4
NDER3
NDER2
NDER1
NDER0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Next Data Enable 7 to 0
When a bit is set to 1, the value in the
corresponding NDRL bit is transferred to the
PODRL bit by the selected output trigger. Values
are not transferred from NDRL to PODRL for
cleared bits.