Datasheet

Section 11 16-Bit Timer Pulse Unit (TPU)
R01UH0310EJ0500 Rev. 5.00 Page 745 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
11.3.6 Timer Counter (TCNT)
The TCNT registers are 16-bit readable/writable counters. The TPU has six TCNT counters, one
for each channel.
The TCNT counters are initialized to H'0000 by a reset, or in hardware standby mode.
The TCNT counters cannot be accessed in 8-bit units; they must always be accessed as a 16-bit
unit.
11.3.7 Timer General Register (TGR)
The TGR registers are 16-bit readable/writable registers with a dual function as output compare
and input capture registers. The TPU has 16 TGR registers, four each for channels 0 and 3 and two
each for channels 1, 2, 4, and 5. TGRC and TGRD for channels 0 and 3 can also be designated for
operation as buffer registers. The TGR registers cannot be accessed in 8-bit units; they must
always be accessed as a 16-bit unit. TGR buffer register combinations are TGRA–TGRC and
TGRB–TGRD.
11.3.8 Timer Start Register (TSTR)
TSTR selects operation/stoppage for channels 0 to 5. When setting the operating mode in TMDR
or setting the count clock in TCR, first stop the TCNT counter.
Bit Bit Name Initial value R/W Description
7
6
⎯
⎯
0
0
⎯
⎯
Reserved
The write value should always be 0.
5
4
3
2
1
0
CST5
CST4
CST3
CST2
CST1
CST0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Counter Start 5 to 0
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops
but the TIOC pin output compare output level is
retained. If TIOR is written to when the CST bit is
cleared to 0, the pin output level will be changed to
the set initial output value.
0: TCNT_5 to TCNT_0 count operation is stopped
1: TCNT_5 to TCNT_0 performs count operation