Datasheet
Section 11 16-Bit Timer Pulse Unit (TPU) 
Page 718 of 1384    R01UH0310EJ0500 Rev. 5.00 
 Sep 25, 2012 
H8S/2426, H8S/2426R, H8S/2424 Group
Table 11.6  TPSC2 to TPSC0 (Channel 0) 
Channel 
Bit 2 
TPSC2 
Bit 1 
TPSC1 
Bit 0 
TPSC0 Description 
0 0 0 0 Internal clock: counts on φ/1 
      1  Internal clock: counts on φ/4 
    1  0  Internal clock: counts on φ/16 
      1  Internal clock: counts on φ/64 
  1  0  0  External clock: counts on TCLKA pin input 
      1  External clock: counts on TCLKB pin input 
    1  0  External clock: counts on TCLKC pin input 
      1  External clock: counts on TCLKD pin input 
Table 11.7  TPSC2 to TPSC0 (Channel 1) 
Channel 
Bit 2 
TPSC2 
Bit 1 
TPSC1 
Bit 0 
TPSC0 Description 
1 0 0 0 Internal clock: counts on φ/1 
      1  Internal clock: counts on φ/4 
    1  0  Internal clock: counts on φ/16 
      1  Internal clock: counts on φ/64 
  1  0  0  External clock: counts on TCLKA pin input 
      1  External clock: counts on TCLKB pin input 
    1  0  Internal clock: counts on φ/256 
      1  Counts on TCNT2 overflow/underflow 
Note:  This setting is ignored when channel 1 is in phase counting mode. 










