Datasheet
Section 10 I/O Ports 
R01UH0310EJ0500 Rev. 5.00    Page 695 of 1384 
Sep 25, 2012     
H8S/2426, H8S/2426R, H8S/2424 Group 
Bit  Bit Name  Initial Value  R/W  Description 
1  A17E  1  R/W  Address 17 Enable 
Enables or disables output for address output 17 
(A17). 
0: DR output when PA1DDR = 1 
1: A17 output when PA1DDR = 1 
0  A16E  1  R/W  Address 16 Enable 
Enables or disables output for address output 16 
(A16). 
0: DR output when PA0DDR = 1 
1: A16 output when PA0DDR = 1 










