Datasheet
Section 10 I/O Ports 
R01UH0310EJ0500 Rev. 5.00    Page 677 of 1384 
Sep 25, 2012     
H8S/2426, H8S/2426R, H8S/2424 Group 
10.15.4  Port G Open Drain Control Register (PGODR) 
PGODR specifies the output type of each port G pin. 
Bit  Bit Name  Initial Value  R/W  Description 
7  ⎯ 0  ⎯ Reserved 
This bit is always read as 0. Only the initial value 
should be written to this bit. 
6 PG6ODR 0  R/W 
5 PG5ODR 0  R/W 
4 PG4ODR 0  R/W 
3 PG3ODR 0  R/W 
2 PG2ODR 0  R/W 
1 PG1ODR 0  R/W 
0 PG0ODR 0  R/W 
When not specified for BACK-A, BREQO-A, CS0, 
CS1, CS2, CS3, CS4*
2
, RAS2*
3
, RAS3*
3
, RAS*
1
, 
or CAS*
1
 output, setting a PGODR bit to 1 makes 
the corresponding pin an NMOS open-drain output 
pin, while clearing a PGODR bit to 0 makes the 
corresponding pin a CMOS output pin. 
Notes:  1.  Not supported in the H8S/2426 and 2424 Groups. 
  2.  Not supported in the H8S/2426 and 2426R Groups. 
  3  Not supported in the 5-V version. 










