Datasheet

Section 10 I/O Ports
R01UH0310EJ0500 Rev. 5.00 Page 661 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
10.14.4 Port F Open Drain Control Register (PFODR)
PFODR specifies the output type of each port F pin.
Bit Bit Name Initial Value R/W Description
7 PF7ODR 0 R/W
6 PF6ODR 0 R/W
5 PF5ODR 0 R/W
4 PF4ODR 0 R/W
3 PF3ODR 0 R/W
2 PF2ODR 0 R/W
1 PF1ODR 0 R/W
0 PF0ODR 0 R/W
When not specified for φ, AS, AH, RD, HWR, LWR,
LCAS*
3
, UCAS*
3
, DQML*
1
, DQMU*
1
, CS5*
2
,
CS6*
2
, or OE-A*
2
*
3
output, setting a PFODR bit to 1
makes the corresponding pin an NMOS open-drain
output pin, while clearing a PFODR bit to 0 makes
the corresponding pin a CMOS output pin.
Notes: 1. Not supported in the H8S/2426 and H8S/2424 Groups.
2. Not supported in the H8S/2426 and H8S/2426R Groups.
3. Not supported in the 5-V version.
10.14.5 Pin Functions
Port F pins also function as the pins for SSU I/Os, A/D converter inputs, interrupt inputs, bus
control signal I/Os, and system clock outputs. The correspondence between the register
specification and the pin functions is shown below.
• PF7/φ
The pin function is switched as shown below according to bit PF7DDR.
Operating
mode
1, 2, 3, 4, 7
PF7DDR 0 1
Pin function PF7 input φ output