Datasheet

Section 10 I/O Ports
Page 648 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
10.12.2 Port D Data Register (PDDR)
PDDR stores output data for the port D pins.
Bit Bit Name Initial Value R/W Description
7 PD7DR 0 R/W
6 PD6DR 0 R/W
5 PD5DR 0 R/W
4 PD4DR 0 R/W
3 PD3DR 0 R/W
2 PD2DR 0 R/W
1 PD1DR 0 R/W
0 PD0DR 0 R/W
Output data for a pin is stored when the pin function
is specified as a general purpose I/O.
10.12.3 Port D Register (PORTD)
PORTD shows the pin states of port D. PORTD cannot be modified.
Bit Bit Name Initial Value R/W Description
7 PD7 ⎯* R
6 PD6 ⎯* R
5 PD5 ⎯* R
4 PD4 ⎯* R
3 PD3 ⎯* R
2 PD2 ⎯* R
1 PD1 ⎯* R
0 PD0 ⎯* R
If this register is read while a PDDDR bit is set to 1,
the corresponding PDDR value is read. If this
register is read while a PDDDR bit is cleared to 0,
the corresponding pin state is read.
Note: * Determined by the states of pins PD7 to PD0.