Datasheet

Section 10 I/O Ports
Page 642 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
• PC3/A3/TIOCD9
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, TPU channel 9 settings (by bits MD3 to MD0 in TMDR_9, bits IOD3 to
IOD0 in TIORL_9, and bits CCLR2 to CCLR0 in TCR_9), and bit PC3DDR.
Operating
mode
1, 2 4 3, 7 (EXPE = 1) 3, 7 (EXPE = 0)
TPU channel
9 settings
⎯ ⎯ (1) in table
below
(2) in table below
PC3DDR ⎯ 0 1 ⎯ 0 1
PC3 input PC3 output Pin function A3 output PC3 input A3 output TIOCD9
output
TIOCD9 input*
TPU channel 9
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOD3 to IOD0 B'0000,
B'0100,
B'1xxx
B'0001 to
B'0011,
B'0101 to
B'0111
⎯ B'xx00 Other than B'xx00
CCLR2 to
CCLR0
⎯ ⎯ ⎯ ⎯ Other than
B'110
B'110
Output function ⎯ Output
compare
output
⎯ ⎯ PWM mode
2 output
⎯
[Legend]
x: Don't care
Note: * TIOCD9 input when MD3 to MD0 = B'0000 and IOD3 to IOD0 = B'10xx.