Datasheet

Section 10 I/O Ports
Page 630 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
• PB3/A11/TIOCD6/TCLKF
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, TPU channel 6 settings (by bits MD3 to MD0 in TMDR_6, bits IOD3 to
IOD0 in TIORL_6, and bits CCLR2 to CCLR0 in TCR_6), bits TPSC2 to TPSC0 in TCR_6 to
TCR_8, and bit PB3DDR.
Operating
mode
1, 2 4 3, 7 (EXPE = 1) 3, 7 (EXPE = 0)
TPU channel
6 settings
⎯ ⎯ (1) in table
below
(2) in table below
PB3DDR ⎯ 0 1 ⎯ 0 1
PB3 input PB3 output TIOCD6
output
TIOCD6 input*
1
Pin function A11 output PB3 input A11 output
TCLKF input*
2
TPU channel 6
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOD3 to IOD0 B'0000,
B'0100,
B'1xxx
B'0001 to
B'0011,
B'0101 to
B'0111
⎯ B'xx00 Other than B'xx00
CCLR2 to
CCLR0
⎯ ⎯ ⎯ ⎯ Other than
B'110
B'110
Output function ⎯ Output
compare
output
⎯ ⎯ PWM mode
2 output
⎯
[Legend]
x: Don't care
Notes: 1. TIOCD6 input when MD3 to MD0 = B'0000 and IOD3 to IOD0 = B'10xx.
2. TCLKF input when the setting for any of TCR_6 to TCR_8 is TPSC2 to TPSC0 = B'101.
TCLKF input when phase counting mode is set for channels 7 and 11.