Datasheet

Section 10 I/O Ports
R01UH0310EJ0500 Rev. 5.00 Page 613 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
10.9.6 Pin Functions
Port A pins also function as the pins for address outputs, interrupt inputs, SSU I/Os, SCI I/Os, and
bus control signal outputs. The correspondence between the register specification and the pin
functions is shown below.
• PA7/A23/CS7*
6
/IRQ7-A/SSO0-B
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, bits MSS and BIDE in SSCRH, bit SSUMS in SSCRL, and bits TE and RE
in SSER of the SSU, bits SSO0S1 and SSO0S0 in PFCR5, bit CS7E*
6
in PFCR0 (the
H8S/2424 Group), bit A23E in PFCR1, bit PA7DDR, and bit ITS7 in ITSR of the interrupt
controller.
• Modes 1, 2, and 4 Modes 3 and 7 (EXPE = 1)
A23E 0 1
CS7E*
6
0 1 ⎯
SSU settings (1) in table below (2) in
table
below
(3) in
table
below
⎯ ⎯
PA7DDR 0 1 0*
4
⎯ 0 1 0 1
PA7 input PA7
output
SSO0-B
input*
2
*
5
SSO0-B
output*
3
*
5
PA7 input CS7
output*
6
PA7 input A23
output
Pin function
IRQ7-A interrupt input*
1