Datasheet

Section 10 I/O Ports
Page 612 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
10.9.4 Port A Pull-Up MOS Control Register (PAPCR)
PAPCR controls on/off of the input pull-up MOS for port A. Bits 7 to 5 are valid in modes 1 and 2
and all the bits are valid in modes 4 and 7.
Bit Bit Name Initial Value R/W Description
7 PA7PCR 0 R/W
6 PA6PCR 0 R/W
5 PA5PCR 0 R/W
4 PA4PCR 0 R/W
3 PA3PCR 0 R/W
2 PA2PCR 0 R/W
1 PA1PCR 0 R/W
0 PA0PCR 0 R/W
When in an input port state, setting the
corresponding bit to 1 turns on the input pull-up
MOS for that pin.
These bits should not be set to 1 when the SCI is
used.
10.9.5 Port A Open Drain Control Register (PAODR)
PAODR specifies the output type of each port A pin.
Bit Bit Name Initial Value R/W Description
7 PA7ODR 0 R/W
6 PA6ODR 0 R/W
5 PA5ODR 0 R/W
4 PA4ODR 0 R/W
3 PA3ODR 0 R/W
2 PA2ODR 0 R/W
1 PA1ODR 0 R/W
0 PA0ODR 0 R/W
When not specified for address output or CS7
output*, setting a PAODR bit to 1 makes the
corresponding pin an NMOS open-drain output pin,
while clearing a PAODR bit to 0 makes the
corresponding pin a CMOS output pin.
Note: * Not supported in the H8S/2426 Group and the H8S/2426R Group