Datasheet

Section 10 I/O Ports
R01UH0310EJ0500 Rev. 5.00 Page 557 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
• P21/IRQ9-B/PO1-A/TIOCB3-A
The pin function is switched as shown below according to the combination of the TPU channel
3 settings (by bits MD3 to MD0 in TMDR_3, bits IOB3 to IOB0 in TIORH_3, and bits
CCLR2 to CCLR0 in TCR_3), bit NDER1 in NDERL of the PPG, bits PPGS and TPUS in
PFCR3, bit P21DDR, and bit ITS9 in ITSR of the interrupt controller.
TPU channel 3
settings
(1) in table
below
(2) in table below
P21DDR ⎯ 0 1
NDER1 ⎯ ⎯ 0 1
P21 input P21 output PO1-A output*
3
TIOCB3-A
output*
4
TIOCB3-A input*
1
*
4
Pin function
IRQ9-B interrupt input*
2
Notes: 1. TIOCB3-A input when MD3 to MD0 = B'0000 and IOB3 to IOB0 = B'10xx.
2. IRQ9-B input when the ITS9 bit in ITSR is 1.
3. When using as PO1-A output, set PPGS in PFCR3 to 0 before other register setting.
4. When using as TIOCB3-A input/output, set TPUS in PFCR3 to 0 before other register
setting.
TPU channel 3
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOB3 to IOB0 B'0000,
B'0100,
B'1xxx
B'0001 to
B'0011,
B'0101 to
B'0111
⎯ B'xx00 Other than B'xx00
CCLR2 to
CCLR0
⎯ ⎯ ⎯ ⎯ Other than
B'010
B'010
Output function ⎯ Output
compare
output
⎯ ⎯ PWM mode
2 output
⎯
[Legend]
x: Don't care