Datasheet

Section 10 I/O Ports
Page 548 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
10.2.2 Port 2 Data Register (P2DR)
P2DR stores output data for the port 2 pins.
Bit Bit Name Initial Value R/W Description
7 P27DR 0 R/W
6 P26DR 0 R/W
5 P25DR 0 R/W
4 P24DR 0 R/W
3 P23DR 0 R/W
2 P22DR 0 R/W
1 P21DR 0 R/W
0 P20DR 0 R/W
Output data for a pin is stored when the pin function
is specified as a general purpose I/O.
10.2.3 Port 2 Register (PORT2)
PORT2 shows the pin states of port 2. PORT2 cannot be modified.
Bit Bit Name Initial Value R/W Description
7 P27 ⎯* R
6 P26 ⎯* R
5 P25 ⎯* R
4 P24 ⎯* R
3 P23 ⎯* R
2 P22 ⎯* R
1 P21 ⎯* R
0 P20 ⎯* R
If this register is read while a P2DDR bit is set to 1,
the corresponding P2DR value is read. If this
register is read while a P2DDR bit is cleared to 0,
the corresponding pin state is read.
Note: * Determined by the states of pins P27 to P20.