Datasheet

Section 10 I/O Ports
R01UH0310EJ0500 Rev. 5.00 Page 515 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Mode 3, 7
Port Description Mode 1 Mode 2 Mode 4
EXPE = 1 EXPE = 0
Schmitt-
triggered
input Pin*
3
Input Pull-
up MOS
Capability
Open Drain
Output
Capability
5-V
Tolerance*
2
PH3/CS7/OE-A*
2
/CKE-A*
1
/IRQ7-B PH3/IRQ7-B IRQ7-B
All output
pin
functions
other than
CS7, OE-
A*
2
and
CKE-A*
1
PH2/CS6/IRQ6-B PH2/IRQ6-B IRQ6-B
All output
pin
functions
other than
CS6
PH1/CS5/RAS5*
2
/SDRAMφ*
1
PH1/
SDRAMφ*
1
All output
pin
functions
other than
RAS5*
2
and
SDRAMφ*
1
Port H
General I/O port
also functioning
as interrupt inputs
and bus control
signal I/Os
PH0/CS4/RAS4*
2
/WE*
1
PH0
⎯
⎯
All output
pin
functions
other than
RAS4*
2
and
WE*
1
⎯
PJ2 ⎯
PJ1
Port J General I/O port
PJ0
⎯ ⎯
All output
pin
functions
O
Notes: 1. Not supported in the H8S/2426 Group.
2. Not supported in the 5-V version.
3. Pins other than Schmitt triggered input pins are CMOS input pins.