Datasheet

Section 8 EXDMA Controller (EXDMAC)
R01UH0310EJ0500 Rev. 5.00 Page 467 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
φ pin EDREQ EDRAK ETEND Bus cycle
Other channel EDREQ Other channel EDRAK
Bus release
EXDMA
read
EXDMA
write
EXDMA
read
EXDMA
write
EXDMA
read
EXDMA
write
EXDMA
read
EXDMA
write
Last transfer
in block
Last transfer
in block
1-block-size transfer period 1-block-size transfer period
Other channel
EXDMA cycle
Bus release
Bus release
RepeatedRepeated
Figure 8.44 External Request/Cycle Steal Mode/Block Transfer Mode
(Contention with Another Channel/Dual Address Mode/Low Level Sensing)